set/clear port bits with atomic instructions instead of read-modify-write, saves time+space, allows port usage in ISR
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@4022 a1c6a512-1295-4272-9138-f99709370657
diff --git a/firmware/backlight.c b/firmware/backlight.c
index 5173d78..9a1159e 100644
--- a/firmware/backlight.c
+++ b/firmware/backlight.c
@@ -26,6 +26,7 @@
#include "rtc.h"
#include "usb.h"
#include "power.h"
+#include "system.h"
#define BACKLIGHT_ON 1
#define BACKLIGHT_OFF 2
@@ -73,7 +74,7 @@
/* Disable square wave */
rtc_write(0x0a, rtc_read(0x0a) & ~0x40);
#else
- PADR |= 0x4000;
+ __set_bit_constant(14-8, &PADRH);
#endif
}
/* else if(backlight_timer) */
@@ -83,7 +84,7 @@
/* Enable square wave */
rtc_write(0x0a, rtc_read(0x0a) | 0x40);
#else
- PADR &= ~0x4000;
+ __clear_bit_constant(14-8, &PADRH);
#endif
}
break;
@@ -93,7 +94,7 @@
/* Disable square wave */
rtc_write(0x0a, rtc_read(0x0a) & ~0x40);
#else
- PADR |= 0x4000;
+ __set_bit_constant(14-8, &PADRH);
#endif
break;
@@ -171,7 +172,7 @@
create_thread(backlight_thread, backlight_stack,
sizeof(backlight_stack), backlight_thread_name);
- PAIOR |= 0x4000;
+ __set_bit_constant(14-8, &PAIORH);
backlight_on();
}
diff --git a/firmware/drivers/ata.c b/firmware/drivers/ata.c
index 01a8fa3..507a0c6 100644
--- a/firmware/drivers/ata.c
+++ b/firmware/drivers/ata.c
@@ -607,11 +607,11 @@
int ret;
/* state HRR0 */
- PADR &= ~0x0200; /* assert _RESET */
+ __clear_bit_constant(9-8, &PADRH); /* assert _RESET */
sleep(1); /* > 25us */
/* state HRR1 */
- PADR |= 0x0200; /* negate _RESET */
+ __set_bit_constant(9-8, &PADRH); /* negate _RESET */
sleep(1); /* > 2ms */
/* state HRR2 */
@@ -718,11 +718,11 @@
void ata_enable(bool on)
{
if(on)
- PADR &= ~0x80; /* enable ATA */
+ __clear_bit_constant(7, &PADRL); /* enable ATA */
else
- PADR |= 0x80; /* disable ATA */
+ __set_bit_constant(7, &PADRL); /* disable ATA */
- PAIOR |= 0x80;
+ __set_bit_constant(7, &PAIORL);
}
static int identify(void)
@@ -787,8 +787,8 @@
led(false);
/* Port A setup */
- PAIOR |= 0x0200; /* output for ATA reset */
- PADR |= 0x0200; /* release ATA reset */
+ __set_bit_constant(9-8, &PAIORH); /* output for ATA reset */
+ __set_bit_constant(9-8, &PADRH); /* release ATA reset */
PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */
sleeping = false;
diff --git a/firmware/drivers/fmradio.c b/firmware/drivers/fmradio.c
index 14abb8e..4b496b7 100644
--- a/firmware/drivers/fmradio.c
+++ b/firmware/drivers/fmradio.c
@@ -21,6 +21,7 @@
#include "kernel.h"
#include "thread.h"
#include "debug.h"
+#include "system.h"
#ifdef HAVE_FMRADIO
@@ -37,15 +38,15 @@
#define PB4 0x0010
/* cute little functions */
-#define CE_LO (PBDR &= ~PB3)
-#define CE_HI (PBDR |= PB3)
-#define CL_LO (PBDR &= ~PB1)
-#define CL_HI (PBDR |= PB1)
+#define CE_LO __clear_bit_constant(3, PBDRL_ADDR)
+#define CE_HI __set_bit_constant(3, PBDRL_ADDR)
+#define CL_LO __clear_bit_constant(1, PBDRL_ADDR)
+#define CL_HI __set_bit_constant(1, PBDRL_ADDR)
#define DO (PBDR & PB4)
-#define DI_LO (PBDR &= ~PB0)
-#define DI_HI (PBDR |= PB0)
+#define DI_LO __clear_bit_constant(0, PBDRL_ADDR)
+#define DI_HI __set_bit_constant(0, PBDRL_ADDR)
-#define START (PBDR |= (PB3 | PB1))
+#define START __set_mask_constant((PB3 | PB1), PBDRL_ADDR)
/* delay loop */
#define DELAY do { int _x; for(_x=0;_x<10;_x++);} while (0)
diff --git a/firmware/drivers/i2c.c b/firmware/drivers/i2c.c
index f0b5907..6530227 100644
--- a/firmware/drivers/i2c.c
+++ b/firmware/drivers/i2c.c
@@ -21,22 +21,23 @@
#include "kernel.h"
#include "thread.h"
#include "debug.h"
+#include "system.h"
#define PB13 0x2000
#define PB7 0x0080
#define PB5 0x0020
-/* cute little functions */
-#define SDA_LO (PBDR &= ~PB7)
-#define SDA_HI (PBDR |= PB7)
-#define SDA_INPUT (PBIOR &= ~PB7)
-#define SDA_OUTPUT (PBIOR |= PB7)
+/* cute little functions, atomic read-modify-write */
+#define SDA_LO __clear_bit_constant(7, &PBDRL)
+#define SDA_HI __set_bit_constant(7, &PBDRL)
+#define SDA_INPUT __clear_bit_constant(7, &PBIORL)
+#define SDA_OUTPUT __set_bit_constant(7, &PBIORL)
#define SDA (PBDR & PB7)
-#define SCL_INPUT (PBIOR &= ~PB13)
-#define SCL_OUTPUT (PBIOR |= PB13)
-#define SCL_LO (PBDR &= ~PB13)
-#define SCL_HI (PBDR |= PB13)
+#define SCL_INPUT __clear_bit_constant(13-8, &PBIORH)
+#define SCL_OUTPUT __set_bit_constant(13-8, &PBIORH)
+#define SCL_LO __clear_bit_constant(13-8, &PBDRH)
+#define SCL_HI __set_bit_constant(13-8, &PBDRH)
#define SCL (PBDR & PB13)
/* arbitrary delay loop */
@@ -81,11 +82,11 @@
PBCR2 &= ~0xcc00; /* PB5 abd PB7 */
/* PB5 is "MAS enable". make it output and high */
- PBIOR |= PB5;
- PBDR |= PB5;
+ __set_bit_constant(5, &PBIORL);
+ __set_bit_constant(5, &PBDRL);
- /* Set the clock line to an output */
- PBIOR |= PB13;
+ /* Set the clock line PB13 to an output */
+ __set_bit_constant(13-8, &PBIORH);
SDA_OUTPUT;
SDA_HI;
@@ -103,9 +104,13 @@
SCL_LO; /* Set the clock low */
if ( bit )
+ {
SDA_HI;
+ }
else
+ {
SDA_LO;
+ }
SCL_INPUT; /* Set the clock to input */
while(!SCL) /* and wait for the MAS to release it */
@@ -153,9 +158,13 @@
/* clock out each bit, MSB first */
for ( i=0x80; i; i>>=1 ) {
if ( i & byte )
+ {
SDA_HI;
+ }
else
+ {
SDA_LO;
+ }
SCL_HI;
SCL_LO;
}
diff --git a/firmware/drivers/led.c b/firmware/drivers/led.c
index 293904f..ad21dc9 100644
--- a/firmware/drivers/led.c
+++ b/firmware/drivers/led.c
@@ -20,6 +20,7 @@
#include <stdbool.h>
#include "sh7034.h"
#include "led.h"
+#include "system.h"
void led(bool on)
{
@@ -30,8 +31,12 @@
asm("and.b" "\t" "%0,@(r0,gbr)" : : "I"(~0x40), "z"(PBDR_ADDR+1));
#else
if ( on )
- PBDR |= 0x40;
+ {
+ __set_bit_constant(6, &PBDRL);
+ }
else
- PBDR &= ~0x40;
+ {
+ __clear_bit_constant(6, &PBDRL);
+ }
#endif
}
diff --git a/firmware/drivers/mas.c b/firmware/drivers/mas.c
index e5967fe..4d2c35b 100644
--- a/firmware/drivers/mas.c
+++ b/firmware/drivers/mas.c
@@ -23,6 +23,7 @@
#include "debug.h"
#include "mas.h"
#include "kernel.h"
+#include "system.h"
extern bool old_recorder;
@@ -268,21 +269,21 @@
#ifdef HAVE_MAS3587F
void mas_reset(void)
{
- PAIOR |= 0x100;
+ __set_bit_constant(8-8, &PAIORH);
if(old_recorder)
{
/* Older recorder models don't invert the POR signal */
- PADR |= 0x100;
+ __set_bit_constant(8-8, &PADRH);
sleep(HZ/100);
- PADR &= ~0x100;
+ __clear_bit_constant(8-8, &PADRH);
sleep(HZ/5);
}
else
{
- PADR &= ~0x100;
+ __clear_bit_constant(8-8, &PADRH);
sleep(HZ/100);
- PADR |= 0x100;
+ __set_bit_constant(8-8, &PADRH);
sleep(HZ/5);
}
}
diff --git a/firmware/drivers/power.c b/firmware/drivers/power.c
index 33015b2..c0fa57d 100644
--- a/firmware/drivers/power.c
+++ b/firmware/drivers/power.c
@@ -21,6 +21,7 @@
#include "config.h"
#include "adc.h"
#include "kernel.h"
+#include "system.h"
#include "power.h"
#ifdef HAVE_CHARGE_CTRL
@@ -32,11 +33,11 @@
void power_init(void)
{
#ifdef HAVE_CHARGE_CTRL
- PBIOR |= 0x20; /* Set charging control bit to output */
- charger_enable(false); /* Default to charger OFF */
+ __set_bit_constant(5, &PBIORL); /* Set charging control bit to output */
+ charger_enable(false); /* Default to charger OFF */
#endif
#ifdef HAVE_ATA_POWER_OFF
- PAIOR |= 0x20;
+ __set_bit_constant(5, &PAIORL);
PACR2 &= 0xFBFF;
#endif
}
@@ -60,11 +61,14 @@
void charger_enable(bool on)
{
#ifdef HAVE_CHARGE_CTRL
- if(on) {
- PBDR &= ~0x20;
+ if(on)
+ {
+ __clear_bit_constant(5, &PBDRL);
charger_enabled = 1;
- } else {
- PBDR |= 0x20;
+ }
+ else
+ {
+ __set_bit_constant(5, &PBDRL);
charger_enabled = 0;
}
#else
@@ -76,9 +80,9 @@
{
#ifdef HAVE_ATA_POWER_OFF
if(on)
- PADR |= 0x20;
+ __set_bit_constant(5, &PADRL);
else
- PADR &= ~0x20;
+ __clear_bit_constant(5, &PADRL);
#else
on = on;
#endif
@@ -88,14 +92,14 @@
{
set_irq_level(15);
#ifdef HAVE_POWEROFF_ON_PBDR
- PBDR &= ~PBDR_BTN_OFF;
- PBIOR |= PBDR_BTN_OFF;
+ __clear_mask_constant(PBDR_BTN_OFF, &PBDRL);
+ __set_mask_constant(PBDR_BTN_OFF, &PBIORL);
#elif defined(HAVE_POWEROFF_ON_PB5)
- PBDR &= ~0x20;
- PBIOR |= 0x20;
+ __clear_bit_constant(5, &PBDRL);
+ __set_bit_constant(5, &PBIORL);
#else
- PADR &= ~0x800;
- PAIOR |= 0x800;
+ __clear_bit_constant(11-8, &PADRH);
+ __set_bit_constant(11-8, &PAIORH);
#endif
while(1);
}
diff --git a/firmware/mpeg.c b/firmware/mpeg.c
index ef6972f..a8f2dd3 100644
--- a/firmware/mpeg.c
+++ b/firmware/mpeg.c
@@ -740,7 +740,7 @@
{
while((*((volatile unsigned char *)PBDR_ADDR) & 0x40))
{
- PADR |= 0x800;
+ __set_bit_constant(11-8, &PADRH);
while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
@@ -748,7 +748,7 @@
the data is read */
asm(" nop\n nop\n nop\n");
asm(" nop\n nop\n nop\n");
- PADR &= ~0x800;
+ __clear_bit_constant(11-8, &PADRH);
while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80));
}
@@ -757,7 +757,7 @@
{
while((*((volatile unsigned char *)PBDR_ADDR) & 0x40))
{
- PADR &= ~0x800;
+ __clear_bit_constant(11-8, &PADRH);
while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
@@ -766,7 +766,7 @@
asm(" nop\n nop\n nop\n");
asm(" nop\n nop\n nop\n");
- PADR |= 0x800;
+ __set_bit_constant(11-8, &PADRH);
while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80));
}
@@ -814,7 +814,7 @@
while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)
&& i < 30)
{
- PADR |= 0x800;
+ __set_bit_constant(11-8, &PADRH);
while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
@@ -828,7 +828,7 @@
i++;
- PADR &= ~0x800;
+ __clear_bit_constant(11-8, &PADRH);
/* No wait for /RTW, cause it's not necessary */
}
@@ -839,7 +839,7 @@
while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)
&& i < 30)
{
- PADR &= ~0x800;
+ __clear_bit_constant(11-8, &PADRH);
while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
@@ -853,7 +853,7 @@
i++;
- PADR |= 0x800;
+ __set_bit_constant(11-8, &PADRH);
/* No wait for /RTW, cause it's not necessary */
}
@@ -2169,7 +2169,7 @@
PBCR1 = (PBCR1 & 0x0cff) | 0x1208;
/* Set PB12 to output */
- PBIOR |= 0x1000;
+ __set_bit_constant(12-8, &PBIORH);
/* Disable serial port */
SCR0 = 0x00;
@@ -2190,8 +2190,8 @@
IPRD &= 0x0ff0;
/* set PB15 and PB14 to inputs */
- PBIOR &= 0x7fff;
- PBIOR &= 0xbfff;
+ __clear_bit_constant(15-8, &PBIORH);
+ __clear_bit_constant(14-8, &PBIORH);
/* Enable End of DMA interrupt at prio 8 */
IPRC = (IPRC & 0xf0ff) | 0x0800;
@@ -3144,7 +3144,7 @@
setup_sci0();
#ifdef HAVE_MAS3587F
- PAIOR |= 0x0800; /* output for /PR */
+ __set_bit_constant(11-8, &PAIORH); /* output for /PR */
init_playback();
mas_version_code = mas_readver();
@@ -3157,9 +3157,9 @@
#endif
#ifdef HAVE_MAS3507D
- PBDR &= ~0x20;
+ __clear_bit_constant(5, &PBDRL);
sleep(HZ/5);
- PBDR |= 0x20;
+ __set_bit_constant(5, &PBDRL);
sleep(HZ/5);
/* set IRQ6 to edge detect */