Fix for Nano timing issues, should resolve crashes, data aborts, and 
general glitchiness in playback. Based on the patch in FS#7510 by Jordan 
Anderson.


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15705 a1c6a512-1295-4272-9138-f99709370657
diff --git a/docs/CREDITS b/docs/CREDITS
index 5c2a5f2..ffff55c 100644
--- a/docs/CREDITS
+++ b/docs/CREDITS
@@ -346,6 +346,7 @@
 Karim Boucher
 James Espinoza
 Franz Rühmland
+Jordan Anderson
 
 The libmad team
 The wavpack team
diff --git a/firmware/target/arm/ata-pp5020.c b/firmware/target/arm/ata-pp5020.c
index 022d165..8fa5471 100644
--- a/firmware/target/arm/ata-pp5020.c
+++ b/firmware/target/arm/ata-pp5020.c
@@ -44,7 +44,9 @@
 {
     /* From ipod-ide.c:ipod_ide_register() */
     IDE0_CFG |= (1<<5);
-    IDE0_CFG &=~(0x10000000);   /* cpu < 65MHz */
+#ifdef IPOD_NANO
+    IDE0_CFG |= (0x10000000); /* cpu > 65MHz */
+#endif
 
     IDE0_PRI_TIMING0 = 0x10;
     IDE0_PRI_TIMING1 = 0x80002150;
diff --git a/firmware/target/arm/system-pp502x.c b/firmware/target/arm/system-pp502x.c
index a1c4d16..4d7e603 100644
--- a/firmware/target/arm/system-pp502x.c
+++ b/firmware/target/arm/system-pp502x.c
@@ -178,6 +178,9 @@
       case CPUFREQ_MAX:
         CLOCK_SOURCE = 0x10007772;  /* source #1: 24MHz, #2, #3, #4: PLL */
         DEV_TIMING1  = 0x00000303;
+#ifdef IPOD_NANO
+	IDE0_CFG |= (0x10000000); /* Set CPU > 65MHz bit */
+#endif
 #ifdef IPOD_MINI2G
         MLCD_SCLK_DIV = 0x00000001; /* Mono LCD bridge serial clock divider */
 #endif
@@ -199,6 +202,9 @@
       case CPUFREQ_NORMAL:
         CLOCK_SOURCE = 0x10007772;  /* source #1: 24MHz, #2, #3, #4: PLL */
         DEV_TIMING1  = 0x00000303;
+#ifdef IPOD_NANO
+	IDE0_CFG &=~(0x10000000); /* clear > 65MHz bit */
+#endif
 #ifdef IPOD_MINI2G
         MLCD_SCLK_DIV = 0x00000000; /* Mono LCD bridge serial clock divider */
 #endif
@@ -229,6 +235,9 @@
 #ifdef IPOD_MINI2G
         MLCD_SCLK_DIV = 0x00000000; /* Mono LCD bridge serial clock divider */
 #endif
+#ifdef IPOD_NANO
+	IDE0_CFG &=~(0x10000000); /* clear > 65MHz bit */
+#endif
         PLL_CONTROL &= ~0x80000000; /* disable PLL */
         cpu_frequency = CPUFREQ_DEFAULT;
         PROC_CTL(CURRENT_CORE) = 0x4800001f; nop;