system: update MEM_ALIGN_ATTR for targets with CPU caches

MEM_ALIGN_ATTR should take advantage of cache line alignment on
all native CPUs which define it, not just ARM CPUs. (This could
arguably be done for hosted targets too, but we don't necessarily
know the size of a cache line there.)

Change-Id: Ife9302105ea57388afd55ce31da848b00b5b1b25
diff --git a/firmware/export/system.h b/firmware/export/system.h
index f554ac7..9558be5 100644
--- a/firmware/export/system.h
+++ b/firmware/export/system.h
@@ -307,8 +307,8 @@
 
 /* Define MEM_ALIGN_ATTR which may be used to align e.g. buffers for faster
  * access. */
-#if defined(CPU_ARM)
-    /* Use ARMs cache alignment. */
+#if defined(HAVE_CPU_CACHE_ALIGN)
+    /* Align to a cache line. */
     #define MEM_ALIGN_ATTR CACHEALIGN_ATTR
     #define MEM_ALIGN_SIZE CACHEALIGN_SIZE
 #elif defined(CPU_COLDFIRE)