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Will Robertson590501c2007-09-21 15:51:53 +00001/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
Michael Sevakisb12c69b2008-04-13 20:03:08 +000010 * Copyright (C) 2008 by Michael Sevakis
Will Robertson590501c2007-09-21 15:51:53 +000011 *
Daniel Stenberg2acc0ac2008-06-28 18:10:04 +000012 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Will Robertson590501c2007-09-21 15:51:53 +000016 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
Michael Sevakisb12c69b2008-04-13 20:03:08 +000021#include "config.h"
22#include "system.h"
23#include "mc13783.h"
Will Robertson590501c2007-09-21 15:51:53 +000024#include "adc-target.h"
25#include "kernel.h"
26
Michael Sevakisb12c69b2008-04-13 20:03:08 +000027/* Do this so we may read all channels in a single SPI message */
Michael Sevakis25ebc852008-04-14 04:22:47 +000028static const unsigned char reg_array[4] =
Michael Sevakisb12c69b2008-04-13 20:03:08 +000029{
30 MC13783_ADC2,
31 MC13783_ADC2,
32 MC13783_ADC2,
33 MC13783_ADC2,
Michael Sevakisb12c69b2008-04-13 20:03:08 +000034};
35
Michael Sevakis25ebc852008-04-14 04:22:47 +000036static uint32_t channels[2][4];
Michael Sevakisb12c69b2008-04-13 20:03:08 +000037static struct wakeup adc_wake;
38static struct mutex adc_mtx;
39static long last_adc_read[2]; /* One for each input group */
40
41/* Read 10-bit ADC channel */
42unsigned short adc_read(int channel)
43{
44 uint32_t data;
45 int input_select;
46
47 if ((unsigned)channel >= NUM_ADC_CHANNELS)
48 return ADC_READ_ERROR;
49
Michael Sevakisb12c69b2008-04-13 20:03:08 +000050 input_select = channel >> 3;
51
Michael Sevakis25ebc852008-04-14 04:22:47 +000052 mutex_lock(&adc_mtx);
53
Michael Sevakisb12c69b2008-04-13 20:03:08 +000054 /* Limit the traffic through here */
Michael Sevakis02575472008-04-14 06:52:38 +000055 if (current_tick != last_adc_read[input_select])
Michael Sevakisb12c69b2008-04-13 20:03:08 +000056 {
57 /* Keep enable, start conversion, increment from channel 0,
58 * increment from channel 4 */
59 uint32_t adc1 = MC13783_ADEN | MC13783_ASC | MC13783_ADA1w(0) |
60 MC13783_ADA2w(4);
61
62 if (input_select == 1)
63 adc1 |= MC13783_ADSEL; /* 2nd set of inputs */
64
65 /* Start conversion */
66 mc13783_write(MC13783_ADC1, adc1);
67
68 /* Wait for done signal */
69 wakeup_wait(&adc_wake, TIMEOUT_BLOCK);
70
71 /* Read all 8 channels that are converted - two channels in each
72 * word. */
Michael Sevakis25ebc852008-04-14 04:22:47 +000073 mc13783_read_regset(reg_array, channels[input_select], 4);
Michael Sevakisb12c69b2008-04-13 20:03:08 +000074
75 last_adc_read[input_select] = current_tick;
76 }
77
Michael Sevakis054c7282008-04-27 22:35:24 +000078 data = channels[input_select][channel & 3];
Michael Sevakisb12c69b2008-04-13 20:03:08 +000079
80 mutex_unlock(&adc_mtx);
81
Michael Sevakisa9c20f52008-05-21 08:42:11 +000082 /* Channels 0-3/8-11 in ADD1, 4-7/12-15 in ADD2 */
Michael Sevakis054c7282008-04-27 22:35:24 +000083 return (channel & 4) ? MC13783_ADD2r(data) : MC13783_ADD1r(data);
Michael Sevakisb12c69b2008-04-13 20:03:08 +000084}
85
Michael Sevakisa9c20f52008-05-21 08:42:11 +000086/* Called by mc13783 interrupt thread when conversion is complete */
Michael Sevakisb12c69b2008-04-13 20:03:08 +000087void adc_done(void)
88{
89 wakeup_signal(&adc_wake);
90}
Will Robertson590501c2007-09-21 15:51:53 +000091
92void adc_init(void)
93{
Michael Sevakisb12c69b2008-04-13 20:03:08 +000094 wakeup_init(&adc_wake);
95 mutex_init(&adc_mtx);
Will Robertson590501c2007-09-21 15:51:53 +000096
Michael Sevakisb12c69b2008-04-13 20:03:08 +000097 /* Init so first reads get data */
98 last_adc_read[0] = last_adc_read[1] = current_tick-1;
Will Robertson590501c2007-09-21 15:51:53 +000099
Michael Sevakis054c7282008-04-27 22:35:24 +0000100 /* Enable increment-by-read, thermistor, charge current */
Michael Sevakisb12c69b2008-04-13 20:03:08 +0000101 mc13783_write(MC13783_ADC0, MC13783_ADINC2 | MC13783_ADINC1 |
Michael Sevakis054c7282008-04-27 22:35:24 +0000102 MC13783_RTHEN | MC13783_CHRGICON);
Michael Sevakisb12c69b2008-04-13 20:03:08 +0000103 /* Enable ADC, set multi-channel mode */
104 mc13783_write(MC13783_ADC1, MC13783_ADEN);
Michael Sevakisa9c20f52008-05-21 08:42:11 +0000105
106 /* Enable ADCDONE event */
107 mc13783_write(MC13783_INTERRUPT_STATUS0, MC13783_ADCDONEI);
108 mc13783_enable_event(MC13783_ADCDONE_EVENT);
Will Robertson590501c2007-09-21 15:51:53 +0000109}