Michael Sevakis | 6dd6ea7 | 2008-05-08 12:09:14 +0000 | [diff] [blame] | 1 | /*************************************************************************** |
| 2 | * __________ __ ___. |
| 3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ |
| 4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / |
| 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
| 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
| 7 | * \/ \/ \/ \/ \/ |
| 8 | * $Id$ |
| 9 | * |
| 10 | * Copyright (C) 2008 by Michael Sevakis |
| 11 | * |
| 12 | * RoLo restart code for IMX31 |
| 13 | * |
Daniel Stenberg | 2acc0ac | 2008-06-28 18:10:04 +0000 | [diff] [blame^] | 14 | * This program is free software; you can redistribute it and/or |
| 15 | * modify it under the terms of the GNU General Public License |
| 16 | * as published by the Free Software Foundation; either version 2 |
| 17 | * of the License, or (at your option) any later version. |
Michael Sevakis | 6dd6ea7 | 2008-05-08 12:09:14 +0000 | [diff] [blame] | 18 | * |
| 19 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY |
| 20 | * KIND, either express or implied. |
| 21 | * |
| 22 | ****************************************************************************/ |
| 23 | #include "config.h" |
| 24 | #include "cpu.h" |
| 25 | |
| 26 | /**************************************************************************** |
| 27 | * void rolo_restart(const unsigned char* source, unsigned char* dest, |
| 28 | * int length) __attribute__((noreturn)); |
| 29 | */ |
| 30 | .section .text, "ax", %progbits |
| 31 | .align 2 |
| 32 | .global rolo_restart |
| 33 | rolo_restart: |
| 34 | adr r4, restart_copy_start |
| 35 | adr r5, restart_copy_end |
| 36 | ldr r6, =IRAM_BASE_ADDR |
| 37 | mov r7, r6 |
| 38 | |
| 39 | @ Copy stub to IRAM |
| 40 | 1: |
| 41 | ldr r8, [r4], #4 |
| 42 | str r8, [r7], #4 |
| 43 | cmp r5, r4 |
| 44 | bhi 1b |
| 45 | |
| 46 | @ Branch to stub |
| 47 | bx r6 |
| 48 | |
| 49 | restart_copy_start: |
| 50 | @ Trivial copy of firmware to final location |
| 51 | mov r4, r1 |
| 52 | 1: |
| 53 | subs r2, r2, #1 |
| 54 | ldrb r7, [r0], #1 |
| 55 | strb r7, [r4], #1 |
| 56 | bge 1b |
| 57 | |
| 58 | @ Clean and invalidate all caches |
| 59 | mov r0, #0 |
| 60 | mcr p15, 0, r0, c7, c14, 0 |
| 61 | mcr p15, 0, r0, c7, c5, 0 |
| 62 | mcr p15, 0, r0, c7, c10, 4 |
| 63 | mcr p15, 0, r0, c7, c5, 4 |
| 64 | |
| 65 | @ Branch to destination (should be address 0x00000000) |
| 66 | bx r1 |
| 67 | restart_copy_end: |
| 68 | .size rolo_restart,.-rolo_restart |