blob: fd75529c92cf80f68ffc4c290a0d7f2e523b4642 [file] [log] [blame]
Marcoen Hirschbergdd754882006-08-12 08:01:54 +00001/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Linus Nielsen Feltzing
11 *
Daniel Stenberg2acc0ac2008-06-28 18:10:04 +000012 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Marcoen Hirschbergdd754882006-08-12 08:01:54 +000016 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
Marcoen Hirschbergdd754882006-08-12 08:01:54 +000022#include "cpu.h"
23#include "system.h"
Marcoen Hirschberg29536762006-12-29 02:49:12 +000024#include "kernel.h"
Karl Kurbjun60fed9a2007-04-11 05:30:15 +000025#include "ata.h"
Dave Chapman16723502007-09-04 08:03:07 +000026#include "usb.h"
Marcoen Hirschberg29536762006-12-29 02:49:12 +000027
28#define USB_RST_ASSERT GPBDAT &= ~(1 << 4)
29#define USB_RST_DEASSERT GPBDAT |= (1 << 4)
30
Karl Kurbjun68afa9d2008-04-22 04:13:07 +000031#define USB_VBUS_PWR_ASSERT GPBDAT |= (1 << 6)
32#define USB_VBUS_PWR_DEASSERT GPBDAT &= ~(1 << 6)
Marcoen Hirschberg29536762006-12-29 02:49:12 +000033
Karl Kurbjunb0810522007-02-12 07:05:15 +000034#define USB_UNIT_IS_PRESENT !(GPFDAT & 0x01)
Marcoen Hirschbergdf437152007-06-23 18:25:41 +000035#define USB_CRADLE_IS_PRESENT ((GPFDAT &0x02)&&((GPGDAT&(3<<13))==(1<<13)))
Marcoen Hirschberg29536762006-12-29 02:49:12 +000036
Karl Kurbjunb0810522007-02-12 07:05:15 +000037#define USB_CRADLE_BUS_ENABLE GPHDAT |= (1 << 8)
38#define USB_CRADLE_BUS_DISABLE GPHDAT &= ~(1 << 8)
Marcoen Hirschberg29536762006-12-29 02:49:12 +000039
40/* The usb detect is one pin to the cpu active low */
Dave Chapman16723502007-09-04 08:03:07 +000041int usb_detect(void)
Marcoen Hirschberg29536762006-12-29 02:49:12 +000042{
Dave Chapman16723502007-09-04 08:03:07 +000043 if (USB_UNIT_IS_PRESENT | USB_CRADLE_IS_PRESENT)
44 return USB_INSERTED;
45 else
46 return USB_EXTRACTED;
Marcoen Hirschberg29536762006-12-29 02:49:12 +000047}
48
Marcoen Hirschbergdd754882006-08-12 08:01:54 +000049void usb_init_device(void)
50{
Karl Kurbjun68afa9d2008-04-22 04:13:07 +000051 /* Setup USB Cradle Power control (output, disabled, no pullup) */
52 GPHCON=( GPHCON&~(1<<17) ) | (1<<16);
53 GPHUP|=1<<8;
54 USB_CRADLE_BUS_DISABLE;
Karl Kurbjun60fed9a2007-04-11 05:30:15 +000055
Karl Kurbjun68afa9d2008-04-22 04:13:07 +000056 /* Setup VBUS PWR (output, asserted, no pullup) */
Karl Kurbjun60fed9a2007-04-11 05:30:15 +000057 GPBCON=( GPBCON&~(1<<13) ) | (1 << 12);
Karl Kurbjun68afa9d2008-04-22 04:13:07 +000058 GPBUP|=1<<6;
59 USB_VBUS_PWR_ASSERT;
Karl Kurbjun60fed9a2007-04-11 05:30:15 +000060
Marcoen Hirschberg29536762006-12-29 02:49:12 +000061 sleep(HZ/20);
Karl Kurbjundcf6bd22007-04-12 07:21:51 +000062
Karl Kurbjun68afa9d2008-04-22 04:13:07 +000063 /* Setup USB reset (output, asserted, no pullup) */
Karl Kurbjun60fed9a2007-04-11 05:30:15 +000064 GPBCON = (GPBCON & ~0x200) | 0x100; /* Make sure reset line is an output */
Karl Kurbjun68afa9d2008-04-22 04:13:07 +000065 GPBUP|=1<<4;
Karl Kurbjun173b6112007-05-07 19:34:34 +000066 USB_RST_ASSERT;
Karl Kurbjun60fed9a2007-04-11 05:30:15 +000067
Marcoen Hirschberg29536762006-12-29 02:49:12 +000068 sleep(HZ/25);
69 USB_RST_DEASSERT;
Karl Kurbjundcf6bd22007-04-12 07:21:51 +000070
Marcoen Hirschberg29536762006-12-29 02:49:12 +000071 /* needed to complete the reset */
Karl Kurbjun60fed9a2007-04-11 05:30:15 +000072 ata_enable(false);
Karl Kurbjundcf6bd22007-04-12 07:21:51 +000073
Marcoen Hirschberg29536762006-12-29 02:49:12 +000074 sleep(HZ/15); /* 66ms */
Karl Kurbjundcf6bd22007-04-12 07:21:51 +000075
Karl Kurbjun60fed9a2007-04-11 05:30:15 +000076 ata_enable(true);
Karl Kurbjundcf6bd22007-04-12 07:21:51 +000077
Marcoen Hirschberg29536762006-12-29 02:49:12 +000078 sleep(HZ/25);
Karl Kurbjundcf6bd22007-04-12 07:21:51 +000079
Marcoen Hirschberg29536762006-12-29 02:49:12 +000080 /* leave chip in low power mode */
Karl Kurbjun68afa9d2008-04-22 04:13:07 +000081 USB_VBUS_PWR_DEASSERT;
Karl Kurbjundcf6bd22007-04-12 07:21:51 +000082
Marcoen Hirschberg29536762006-12-29 02:49:12 +000083 sleep(HZ/25);
Marcoen Hirschbergdd754882006-08-12 08:01:54 +000084}
85
Marcoen Hirschbergdd754882006-08-12 08:01:54 +000086void usb_enable(bool on)
Karl Kurbjun68afa9d2008-04-22 04:13:07 +000087{
Marcoen Hirschberg29536762006-12-29 02:49:12 +000088 if (on)
89 {
Karl Kurbjun68afa9d2008-04-22 04:13:07 +000090 USB_VBUS_PWR_ASSERT;
Karl Kurbjunb0810522007-02-12 07:05:15 +000091 if(USB_CRADLE_IS_PRESENT) USB_CRADLE_BUS_ENABLE;
Marcoen Hirschbergdd754882006-08-12 08:01:54 +000092 }
Marcoen Hirschberg29536762006-12-29 02:49:12 +000093 else
94 {
Karl Kurbjunb0810522007-02-12 07:05:15 +000095 if(USB_CRADLE_IS_PRESENT) USB_CRADLE_BUS_DISABLE;
Karl Kurbjun68afa9d2008-04-22 04:13:07 +000096 USB_VBUS_PWR_DEASSERT;
Marcoen Hirschberg29536762006-12-29 02:49:12 +000097 }
Karl Kurbjunb0810522007-02-12 07:05:15 +000098
Marcoen Hirschberg29536762006-12-29 02:49:12 +000099 sleep(HZ/20); // > 50ms for detecting the enable state change
Marcoen Hirschbergdd754882006-08-12 08:01:54 +0000100}