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gerrit.rockbox.org / rockbox / 2acc0ac542d9186feee25bbe444c49cb59ca393e / . / firmware / target / coldfire / memset-coldfire.S
blob: 839b305a05c58d3fcbfe083755d5bee194f4530b [file] [log] [blame]
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]10 * Copyright (C) 2004 by Jens Arnold
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]11 *
Daniel Stenberg2acc0ac2008-06-28 18:10:04 +0000[diff] [blame^]12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22
23 .section .icode,"ax",@progbits
24
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]25 .align 2
26 .global memset
27 .type memset,@function
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]28
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]29/* Fills a memory region with specified byte value
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]30 * This version is optimized for speed
31 *
32 * arguments:
33 * (4,%sp) - start address
34 * (8,%sp) - data
35 * (12,%sp) - length
36 *
37 * return value:
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]38 * %d0 - start address (like ANSI version)
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]39 *
40 * register usage:
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]41 * %d0 - data (spread to all 4 bytes when using long stores)
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]42 * %d1 - temporary / data (for burst transfer)
43 * %d2 - data (for burst transfer)
44 * %d3 - data (for burst transfer)
45 * %a0 - start address
46 * %a1 - current address (runs down from end to start)
47 *
48 * For maximum speed this routine uses both long stores and burst mode,
49 * storing whole lines with movem.l. The routine fills memory from end
50 * to start in order to ease returning the start address.
51 */
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]52memset:
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]53 move.l (4,%sp),%a0 /* start address */
54 move.l (8,%sp),%d0 /* data */
55 move.l (12,%sp),%a1 /* length */
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]56 add.l %a0,%a1 /* %a1 = end address */
57
58 move.l %a0,%d1
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]59 addq.l #7,%d1
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]60 and.l #0xFFFFFFFC,%d1 /* %d1 = first long bound + 4 */
61 cmp.l %d1,%a1 /* at least one aligned longword to fill? */
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]62 blo.b .no_longs /* no, jump directly to byte loop */
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]63
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]64 and.l #0xFF,%d0 /* start: spread data to all 4 bytes */
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]65 move.l %d0,%d1
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]66 lsl.l #8,%d1
67 or.l %d1,%d0 /* data now in 2 lower bytes of %d0 */
68 move.l %d0,%d1
69 swap %d0
70 or.l %d1,%d0 /* data now in all 4 bytes of %d0 */
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]71
72 move.l %a1,%d1
73 and.l #0xFFFFFFFC,%d1 /* %d1 = last long bound */
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]74 cmp.l %d1,%a1 /* any bytes to set? */
75 bls.b .end_b1 /* no: skip byte loop */
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]76
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]77 /* leading byte loop: sets 0..3 bytes */
78.loop_b1:
79 move.b %d0,-(%a1) /* store byte */
80 cmp.l %d1,%a1 /* runs %a1 down to last long bound */
81 bhi.b .loop_b1
82
83.end_b1:
84 moveq.l #31,%d1
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]85 add.l %a0,%d1
86 and.l #0xFFFFFFF0,%d1 /* %d1 = first line bound + 16 */
87 cmp.l %d1,%a1 /* at least one full line to fill? */
88 blo.b .no_lines /* no, jump to longword loop */
89
90 mov.l %a1,%d1
91 and.l #0xFFFFFFF0,%d1 /* %d1 = last line bound */
92 cmp.l %d1,%a1 /* any longwords to set? */
93 bls.b .end_l1 /* no: skip longword loop */
94
95 /* leading longword loop: sets 0..3 longwords */
96.loop_l1:
97 move.l %d0,-(%a1) /* store longword */
98 cmp.l %d1,%a1 /* runs %a1 down to last line bound */
99 bhi.b .loop_l1
100
101.end_l1:
102 move.l %d2,-(%sp) /* free some registers */
103 move.l %d3,-(%sp)
104
105 move.l %d0,%d1 /* spread data to 4 data registers */
106 move.l %d0,%d2
107 move.l %d0,%d3
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]108 lea.l (15,%a0),%a0 /* start address += 15, acct. for trl. data */
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]109
110 /* main loop: set whole lines utilising burst mode */
111.loop_line:
112 lea.l (-16,%a1),%a1 /* pre-decrement */
113 movem.l %d0-%d3,(%a1) /* store line */
114 cmp.l %a0,%a1 /* runs %a1 down to first line bound */
115 bhi.b .loop_line
116
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]117 lea.l (-15,%a0),%a0 /* correct start address */
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]118 move.l (%sp)+,%d3 /* restore registers */
119 move.l (%sp)+,%d2
120
121 move.l %a0,%d1 /* %d1 = start address ... */
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]122 addq.l #3,%d1 /* ... +3, account for possible trailing bytes */
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]123 cmp.l %d1,%a1 /* any longwords left */
124 bhi.b .loop_l2 /* yes: jump to longword loop */
125 bra.b .no_longs /* no: skip loop */
126
127.no_lines:
128 move.l %a0,%d1 /* %d1 = start address ... */
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]129 addq.l #3,%d1 /* ... +3, account for possible trailing bytes */
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]130
131 /* trailing longword loop */
132.loop_l2:
133 move.l %d0,-(%a1) /* store longword */
134 cmp.l %d1,%a1 /* runs %a1 down to first long bound */
135 bhi.b .loop_l2
136
137.no_longs:
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]138 cmp.l %a0,%a1 /* any bytes left? */
139 bls.b .end_b2 /* no: skip loop */
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]140
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]141 /* trailing byte loop */
142.loop_b2:
143 move.b %d0,-(%a1) /* store byte */
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]144 cmp.l %a0,%a1 /* runs %a1 down to start address */
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]145 bhi.b .loop_b2
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]146
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]147.end_b2:
Jens Arnoldeb65f892006-02-22 01:20:45 +0000[diff] [blame]148 move.l %a0,%d0 /* return start address */
149 rts
150
151.end:
Linus Nielsen Feltzing5a0cb682006-07-25 11:16:03 +0000[diff] [blame]152 .size memset,.end-memset