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Tomasz Malesinski2aabc872006-01-25 01:43:07 +00001#include "config.h"
2
3#ifdef CPU_ARM
4ENTRY(start)
5STARTUP(crt0.o)
6OUTPUT_FORMAT(elf32-littlearm)
7#else
Björn Stenbergd42d78f2002-04-15 08:35:08 +00008ENTRY(_start)
9OUTPUT_FORMAT(elf32-sh)
Tomasz Malesinski2aabc872006-01-25 01:43:07 +000010#endif
11
12#ifdef IRIVER_IFP7XX_SERIES
13MEMORY
14{
15 IRAM : ORIGIN = 0, LENGTH = 0x10000
Tomasz Malesinskie7f7c3d2006-02-12 23:16:05 +000016 DRAM : ORIGIN = 0xc00000, LENGTH = 0x6000
17 DRAM_API : ORIGIN = 0xc06000, LENGTH = 0x100
Tomasz Malesinski2aabc872006-01-25 01:43:07 +000018}
19
20SECTIONS
21{
22 .text :
23 {
24 *(.init*)
25 *(.text)
26 *(.text*)
27 *(.rodata)
28 *(.rodata*)
29 *(.glue_7)
30 *(.glue_7t)
31 } >DRAM
32
Tomasz Malesinskiec7e9762006-02-04 00:04:02 +000033 .gdbapi :
34 {
35 *(.gdbapi)
36 } >DRAM_API
37
Tomasz Malesinski2aabc872006-01-25 01:43:07 +000038 .data :
39 {
40 *(.data)
41 } >DRAM
42
43 .vectors :
44 {
45 _vectorsstart = .;
46 *(.vectors)
47 _vectorsend = .;
48 } >IRAM AT>DRAM
49 _vectorscopy = LOADADDR(.vectors);
50
51 .stack (NOLOAD) :
52 {
53 stackbegin = .;
54 . += 0x400;
55 _stub_stack = .;
56 . += 0x200;
57 stackend = .;
58 } >DRAM
59
60 .bss (NOLOAD) :
61 {
62 _edata = .;
63 *(.bss)
64 _end = .;
65 } >DRAM
66}
67#else
68
Björn Stenbergd42d78f2002-04-15 08:35:08 +000069SECTIONS
70{
71 .vectors 0x09000000 :
72 {
73 *(.vectors);
74 . = ALIGN(0x200);
75 start.o(.text)
76 *(.rodata)
77 }
78
Björn Stenbergd42d78f2002-04-15 08:35:08 +000079 .text :
80 {
81 *(.text)
82 }
83
Linus Nielsen Feltzing8ee52132002-04-23 21:59:20 +000084 .bss :
85 {
86 _stack = . + 0x1000;
87 _stub_stack = _stack + 0x1000;
88 }
89
Björn Stenbergd42d78f2002-04-15 08:35:08 +000090 .pad 0x0900C800 :
91 {
92 LONG(0);
93 }
Tomasz Malesinski2aabc872006-01-25 01:43:07 +000094}
95
96#endif