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gerrit.rockbox.org / rockbox / 7e8e1005d1f72c9fd846d45742a12c5654c337a5 / . / firmware / system.c
blob: 8e9c7ff692ef7ef26279c98347dd7e5d25c2dfa3 [file] [log] [blame]
Björn Stenbergd9eb5c72002-03-28 15:09:10 +0000[diff] [blame]1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Alan Korr
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19
20#include <lcd.h>
21#include <led.h>
22
23#define default_interrupt(name,number) \
24 extern __attribute__((weak,alias("UIE" #number))) void name (void); void UIE##number (void)
25#define reserve_interrupt(number) \
26 void UIE##number (void)
27
28extern void reset_pc (void);
29extern void reset_sp (void);
30
31reserve_interrupt ( 0);
32reserve_interrupt ( 1);
33reserve_interrupt ( 2);
34reserve_interrupt ( 3);
35default_interrupt (GII, 4);
36reserve_interrupt ( 5);
37default_interrupt (ISI, 6);
38reserve_interrupt ( 7);
39reserve_interrupt ( 8);
40default_interrupt (CPUAE, 9);
41default_interrupt (DMAAE, 10);
42default_interrupt (NMI, 11);
43default_interrupt (UB, 12);
44reserve_interrupt ( 13);
45reserve_interrupt ( 14);
46reserve_interrupt ( 15);
47reserve_interrupt ( 16); // TCB #0
48reserve_interrupt ( 17); // TCB #1
49reserve_interrupt ( 18); // TCB #2
50reserve_interrupt ( 19); // TCB #3
51reserve_interrupt ( 20); // TCB #4
52reserve_interrupt ( 21); // TCB #5
53reserve_interrupt ( 22); // TCB #6
54reserve_interrupt ( 23); // TCB #7
55reserve_interrupt ( 24); // TCB #8
56reserve_interrupt ( 25); // TCB #9
57reserve_interrupt ( 26); // TCB #10
58reserve_interrupt ( 27); // TCB #11
59reserve_interrupt ( 28); // TCB #12
60reserve_interrupt ( 29); // TCB #13
61reserve_interrupt ( 30); // TCB #14
62reserve_interrupt ( 31); // TCB #15
63default_interrupt (TRAPA32, 32);
64default_interrupt (TRAPA33, 33);
65default_interrupt (TRAPA34, 34);
66default_interrupt (TRAPA35, 35);
67default_interrupt (TRAPA36, 36);
68default_interrupt (TRAPA37, 37);
69default_interrupt (TRAPA38, 38);
70default_interrupt (TRAPA39, 39);
71default_interrupt (TRAPA40, 40);
72default_interrupt (TRAPA41, 41);
73default_interrupt (TRAPA42, 42);
74default_interrupt (TRAPA43, 43);
75default_interrupt (TRAPA44, 44);
76default_interrupt (TRAPA45, 45);
77default_interrupt (TRAPA46, 46);
78default_interrupt (TRAPA47, 47);
79default_interrupt (TRAPA48, 48);
80default_interrupt (TRAPA49, 49);
81default_interrupt (TRAPA50, 50);
82default_interrupt (TRAPA51, 51);
83default_interrupt (TRAPA52, 52);
84default_interrupt (TRAPA53, 53);
85default_interrupt (TRAPA54, 54);
86default_interrupt (TRAPA55, 55);
87default_interrupt (TRAPA56, 56);
88default_interrupt (TRAPA57, 57);
89default_interrupt (TRAPA58, 58);
90default_interrupt (TRAPA59, 59);
91default_interrupt (TRAPA60, 60);
92default_interrupt (TRAPA61, 61);
93default_interrupt (TRAPA62, 62);
94default_interrupt (TRAPA63, 63);
95default_interrupt (IRQ0, 64);
96default_interrupt (IRQ1, 65);
97default_interrupt (IRQ2, 66);
98default_interrupt (IRQ3, 67);
99default_interrupt (IRQ4, 68);
100default_interrupt (IRQ5, 69);
101default_interrupt (IRQ6, 70);
102default_interrupt (IRQ7, 71);
103default_interrupt (DEI0, 72);
104reserve_interrupt ( 73);
105default_interrupt (DEI1, 74);
106reserve_interrupt ( 75);
107default_interrupt (DEI2, 76);
108reserve_interrupt ( 77);
109default_interrupt (DEI3, 78);
110reserve_interrupt ( 79);
111default_interrupt (IMIA0, 80);
112default_interrupt (IMIB0, 81);
113default_interrupt (OVI0, 82);
114reserve_interrupt ( 83);
115default_interrupt (IMIA1, 84);
116default_interrupt (IMIB1, 85);
117default_interrupt (OVI1, 86);
118reserve_interrupt ( 87);
119default_interrupt (IMIA2, 88);
120default_interrupt (IMIB2, 89);
121default_interrupt (OVI2, 90);
122reserve_interrupt ( 91);
123default_interrupt (IMIA3, 92);
124default_interrupt (IMIB3, 93);
125default_interrupt (OVI3, 94);
126reserve_interrupt ( 95);
127default_interrupt (IMIA4, 96);
128default_interrupt (IMIB4, 97);
129default_interrupt (OVI4, 98);
130reserve_interrupt ( 99);
131default_interrupt (REI0, 100);
132default_interrupt (RXI0, 101);
133default_interrupt (TXI0, 102);
134default_interrupt (TEI0, 103);
135default_interrupt (REI1, 104);
136default_interrupt (RXI1, 105);
137default_interrupt (TXI1, 106);
138default_interrupt (TEI1, 107);
139reserve_interrupt ( 108);
140default_interrupt (ADITI, 109);
141
142void (*vbr[]) (void) __attribute__ ((section (".sram.vbr"))) =
143 {
144 /*** 0-1 Power-on Reset ***/
145
146 reset_pc,reset_sp,
147
148 /*** 2-3 Manual Reset ***/
149
150 reset_pc,reset_sp,
151
152 /*** 4 General Illegal Instruction ***/
153
154 GII,
155
156 /*** 5 Reserved ***/
157
158 UIE5,
159
160 /*** 6 Illegal Slot Instruction ***/
161
162 ISI,
163
164 /*** 7-8 Reserved ***/
165
166 UIE7,UIE8,
167
168 /*** 9 CPU Address Error ***/
169
170 CPUAE,
171
172 /*** 10 DMA Address Error ***/
173
174 DMAAE,
175
176 /*** 11 NMI ***/
177
178 NMI,
179
180 /*** 12 User Break ***/
181
182 UB,
183
184 /*** 13-31 Reserved ***/
185
186 UIE13,UIE14,UIE15,UIE16,UIE17,UIE18,UIE19,UIE20,UIE21,UIE22,UIE23,UIE24,UIE25,UIE26,UIE27,UIE28,UIE29,UIE30,UIE31,
187
188 /*** 32-63 TRAPA #20...#3F ***/
189
190 TRAPA32,TRAPA33,TRAPA34,TRAPA35,TRAPA36,TRAPA37,TRAPA38,TRAPA39,TRAPA40,TRAPA41,TRAPA42,TRAPA43,TRAPA44,TRAPA45,TRAPA46,TRAPA47,TRAPA48,TRAPA49,TRAPA50,TRAPA51,TRAPA52,TRAPA53,TRAPA54,TRAPA55,TRAPA56,TRAPA57,TRAPA58,TRAPA59,TRAPA60,TRAPA61,TRAPA62,TRAPA63,
191
192 /*** 64-71 IRQ0-7 ***/
193
194 IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,
195
196 /*** 72 DMAC0 ***/
197
198 DEI0,
199
200 /*** 73 Reserved ***/
201
202 UIE73,
203
204 /*** 74 DMAC1 ***/
205
206 DEI1,
207
208 /*** 75 Reserved ***/
209
210 UIE75,
211
212 /*** 76 DMAC2 ***/
213
214 DEI2,
215
216 /*** 77 Reserved ***/
217
218 UIE77,
219
220 /*** 78 DMAC3 ***/
221
222 DEI3,
223
224 /*** 79 Reserved ***/
225
226 UIE79,
227
228 /*** 80-82 ITU0 ***/
229
230 IMIA0,IMIB0,OVI0,
231
232 /*** 83 Reserved ***/
233
234 UIE83,
235
236 /*** 84-86 ITU1 ***/
237
238 IMIA1,IMIB1,OVI1,
239
240 /*** 87 Reserved ***/
241
242 UIE87,
243
244 /*** 88-90 ITU2 ***/
245
246 IMIA2,IMIB2,OVI2,
247
248 /*** 91 Reserved ***/
249
250 UIE91,
251
252 /*** 92-94 ITU3 ***/
253
254 IMIA3,IMIB3,OVI3,
255
256 /*** 95 Reserved ***/
257
258 UIE95,
259
260 /*** 96-98 ITU4 ***/
261
262 IMIA4,IMIB4,OVI4,
263
264 /*** 99 Reserved ***/
265
266 UIE99,
267
268 /*** 100-103 SCI0 ***/
269
270 REI0,RXI0,TXI0,TEI0,
271
272 /*** 104-107 SCI1 ***/
273
274 REI1,RXI1,TXI1,TEI1,
275
276 /*** 108 Parity Control Unit ***/
277
278 UIE108,
279
280 /*** 109 AD Converter ***/
281
282 ADITI
283
284 };
285
286
287void system_reboot (void)
288 {
289 cli ();
290
291 asm volatile ("ldc\t%0,vbr" : : "r"(0));
292
293 SI(INTCIPRAB) =
294 SI(INTCIPRCD) = 0;
295 HI(INTCIPRE) =
296 HI(INTCICR) = 0;
297
298 asm volatile ("jmp @%0; mov.l @%1,r15" : : "r"(SI(0)),"r"(4));
299 }
300
301void UIE (unsigned int pc) /* Unexpected Interrupt or Exception */
302 {
303 unsigned int i,n;
304 lcd_stop ();
305 asm volatile ("sts\tpr,%0" : "=r"(n));
306 n = (n - (unsigned)UIE0 - 4)>>2; // get exception or interrupt number
307 lcd_start ();
308 lcd_goto (0,0); lcd_puts ("** UIE00 **");
309 lcd_goto (0,1); lcd_puts ("AT 00000000");
310 lcd_goto (6,0); lcd_puthex (n,2);
311 lcd_goto (3,1); lcd_puthex (pc,8); /* or pc - 4 !? */
312 lcd_stop ();
313
314 while (1)
315 {
316 led_toggle ();
317
318 for (i = 0; i < 240000; ++i);
319 }
320 }
321
322asm (
323 "_UIE0:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
324 "_UIE1:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
325 "_UIE2:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
326 "_UIE3:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
327 "_UIE4:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
328 "_UIE5:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
329 "_UIE6:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
330 "_UIE7:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
331 "_UIE8:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
332 "_UIE9:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
333 "_UIE10:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
334 "_UIE11:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
335 "_UIE12:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
336 "_UIE13:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
337 "_UIE14:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
338 "_UIE15:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
339 "_UIE16:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
340 "_UIE17:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
341 "_UIE18:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
342 "_UIE19:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
343 "_UIE20:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
344 "_UIE21:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
345 "_UIE22:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
346 "_UIE23:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
347 "_UIE24:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
348 "_UIE25:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
349 "_UIE26:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
350 "_UIE27:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
351 "_UIE28:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
352 "_UIE29:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
353 "_UIE30:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
354 "_UIE31:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
355 "_UIE32:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
356 "_UIE33:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
357 "_UIE34:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
358 "_UIE35:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
359 "_UIE36:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
360 "_UIE37:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
361 "_UIE38:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
362 "_UIE39:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
363 "_UIE40:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
364 "_UIE41:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
365 "_UIE42:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
366 "_UIE43:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
367 "_UIE44:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
368 "_UIE45:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
369 "_UIE46:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
370 "_UIE47:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
371 "_UIE48:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
372 "_UIE49:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
373 "_UIE50:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
374 "_UIE51:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
375 "_UIE52:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
376 "_UIE53:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
377 "_UIE54:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
378 "_UIE55:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
379 "_UIE56:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
380 "_UIE57:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
381 "_UIE58:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
382 "_UIE59:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
383 "_UIE60:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
384 "_UIE61:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
385 "_UIE62:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
386 "_UIE63:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
387 "_UIE64:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
388 "_UIE65:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
389 "_UIE66:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
390 "_UIE67:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
391 "_UIE68:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
392 "_UIE69:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
393 "_UIE70:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
394 "_UIE71:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
395 "_UIE72:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
396 "_UIE73:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
397 "_UIE74:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
398 "_UIE75:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
399 "_UIE76:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
400 "_UIE77:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
401 "_UIE78:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
402 "_UIE79:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
403 "_UIE80:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
404 "_UIE81:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
405 "_UIE82:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
406 "_UIE83:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
407 "_UIE84:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
408 "_UIE85:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
409 "_UIE86:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
410 "_UIE87:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
411 "_UIE88:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
412 "_UIE89:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
413 "_UIE90:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
414 "_UIE91:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
415 "_UIE92:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
416 "_UIE93:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
417 "_UIE94:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
418 "_UIE95:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
419 "_UIE96:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
420 "_UIE97:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
421 "_UIE98:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
422 "_UIE99:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
423 "_UIE100:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
424 "_UIE101:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
425 "_UIE102:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
426 "_UIE103:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
427 "_UIE104:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
428 "_UIE105:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
429 "_UIE106:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
430 "_UIE107:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
431 "_UIE108:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\t\n"
432 "_UIE109:\tbsr\t_UIE\n\tmov.l\t@r15+,r4");